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NXP Semiconductors
LPC1111/12/13/14
11. Application information
11.1 XTAL input
The input voltage to the on-chip oscillators is limited to 1.8 V. If the oscillator is driven by a
clock in slave mode, it is recommended that the input be coupled through a capacitor with
C i = 100 pF. To limit the input voltage to the specified range, choose an additional
capacitor to ground C g which attenuates the input voltage by a factor C i /(C i + C g ). In slave
mode, a minimum of 200 mV(RMS) is needed.
LPC1xxx
XTALIN
Ci
Cg
100 pF
002aae788
Fig 23. Slave mode operation of the on-chip oscillator
11.2 XTAL Printed Circuit Board (PCB) layout guidelines
The crystal should be connected on the PCB as close as possible to the oscillator input
and output pins of the chip. Take care that the load capacitors C x1 ,C x2 , and C x3 in case of
third overtone crystal usage have a common ground plane. The external components
must also be connected to the ground plain. Loops must be made as small as possible in
order to keep the noise coupled in via the PCB as small as possible. Also parasitics
should stay as small as possible. Values of C x1 and C x2 should be chosen smaller
accordingly to the increase in parasitics of the PCB layout.
11.3 Standard I/O pad configuration
Figure 24 shows the possible pin modes for standard I/O pins. The pull-up and pull-down
resistors (R pu and R pd ) can be enabled or disabled. The default value for each standard
port pin is input with R pu enabled. For details on pin modes and hysteresis control, see the
LPC11xx user manual .
LPC1111_12_13_14_0
? NXP B.V. 2009. All rights reserved.
Objective data sheet
Rev. 00.11 — 13 November 2009
45 of 53
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